Simple Boolean Logic Gates

A good first step in understanding how to implement a Bayesian network in analog subthreshold CMOS is to implement some simple soft boolean logic gates. Boolean logic gates can be represented by trellis modules, which are a type of bipartite graph with labeled edges. From these modules, we can build analog CMOS gates using the building blocks described in the previous section.

Trellis Modules

Figure 8: A trellis module that represents the function $f(x,y,z) = 1$ iff $z = x \oplus y$.

An example of a trellis module for a boolean EXOR gate is shown in figure 8. This trellis module describes the boolean function $f(x,y,z) = 1$ iff $z = x \oplus y$. One edge is drawn for each case where $z = x \oplus y$, so in this module there are four edges. No edge is drawn for the case where $x = 1$, $y = 1$, and $z = 1$, because it does not satisfy the requirement that $z = x \oplus y$, which means $f(x,y,z) = 0$.

Figure 9: A trellis module that represents the function $f(x,y,z) = 1$ iff $x = y + z$.

A second trellis module example is shown in figure 9. This module implements the boolean function $f(x,y,z) = 1$ iff $x = y + z$. This type of calculation can be seen as a backwards reasoning wherein the result, $z$, is needed to perform the calculation [10]. This type of backward function expresses the idea that we have some apriori knowledge regarding the relationship between $x$, $y$, and $z$, and that knowledge is expressed in the edges of the trellis module.

If we are given that $x = 0$ and $y = 0$, from the trellis module we see that $z = 0$. On the other hand, there is no edge representing the relationship between $x$, $y$, and $z$ if $x = 0$ and $y = 1$. This indicates that we have no apriori knowledge about this case and the value of $z$ is unknown.

CMOS EXOR Gate

Building a circuit that implements a soft boolean logic gate is similar to constructing a trellis module for it. We enumerate the various possible inputs and observe if the function $f(x,y,z)$ evaluates to true. In a trellis module, for the cases where the function is true, we need only draw an edge. In a circuit, we need to do a calculation:

$$p(z) = \sum_x \sum_y f(x,y,z)p(x)p(y),$$ (26)

which is simply equation 2 applied to a problem with two inputs, $x$, and $y$, and one output, $z$. In cases where $f(x,y,z) = 0$, the term $f(x,y,z)p(x)p(y)$ evaluates to zero and we throw it out. For an EXOR gate, this enumeration is as follows:

$x$	$y$	$z$	$f(x,y,z)$
0	0	0	1
0	0	1	0
0	1	0	0
0	1	1	1
1	0	0	0
1	0	1	1
1	1	0	1
1	1	1	0

From this chart, we see that the EXOR gate must implement the following functions:

$$p(z = 0) = p(x = 0)p(y = 0) + p(x = 1)p(y = 1)$$ (27)

$$p(z = 1) = p(x = 0)p(y = 1) + p(x = 1)p(y = 0).$$ (28)

Now we know exactly what the EXOR circuit must do, and we have the parts from which to build it. The first thing to notice is that the calculation will involve four multiplications and two additions. The additions are shorts between wires and the multiplications can be implemented by the Gilbert multiplication circuits covered in section 5.5.

To use the multipliers, we take advantage of the fact that $p(x = 0) + p(x = 1) = 1$ and $p(y = 0) + p(y = 1) = 1$. Simply stated, the inputs to the multiplier cells, $I_{in1}$ and $I_{in2}$, must be either $p(x = 0)$ and $p(x = 1)$ or $p(y = 0)$ and $p(y = 1)$ and this will ensure that the multipliers multiply properly. If we choose to use $p(y = 0)$ and $p(y = 1)$, then the inputs to the base of the multipliers, $I_{inb}$, must be $p(x = 0)$ and $p(x = 1)$. The cells then give us all 4 possible multiples of the $x$ and $y$ variables. With these in hand we need only sum them according to equations 27 and 28, by shorting the outputs $I_{1}$ and $I_{2}$ from each of the cells in the appropriate way. The final addition to the circuit is a pair of current mirrors that reflect the output so that it can be used as the input to another circuit. The schematic is shown in figure 10.

Figure 10: Schematic for a boolean EXOR gate.

CMOS OR Gate

The CMOS OR gate is similar to the EXOR gate in structure but is a useful example in that it shows what to do if more than one copy of a particular signal is needed and what to do if no copies are needed. It also shows that implementation of backwards reasoning is no more difficult than forwards reasoning. The truth table for the function $f(x,y,z) = 1$ iff $x = y + z$ is:

$x$	$y$	$z$	$f(x,y,z)$
0	0	0	1
0	0	1	0
0	1	0	0
0	1	1	0
1	0	0	0
1	0	1	1
1	1	0	1
1	1	1	1

Again applying equation 2, we get the functions:

$$p(z = 0) = p(x = 0)p(y = 0) + p(x = 1)p(y = 1)$$ (29)

$$p(z = 1) = p(x = 1)p(y = 0) + p(x = 1)p(y = 1).$$ (30)

Equations 29 and 30 show that we will need two copies of the term $p(x = 1)p(y = 1)$ and no copies of the term $p(x = 0)p(y = 1)$. The schematic in figure 11 shows how to deal with this situation. The unused term is tied to $V_{dd}$ and term that we need two copies of is duplicated with a current mirror that has two transistors in its train. Otherwise the structure of the circuit is analogous to the EXOR gate.

Figure 11: Schematic for a boolean AND gate.