Dechao Guo
Ph.D. Student, Research Assistant

Becton Center #317
Department of Electrical Engineering
Yale University
New Haven, CT 06520
Lab phone: 203-432-4209
Fax: 203-432-7769
Email: dechao.guo@yale.edu

Web-site

Research Summary

1. Characterizations of advanced high-k gate dielectrics, aimed for high performance device applications, including studies of charge pumping, interface states, mobility degradation, and reliability issues.

2. Development and utilization of novel characterization techniques for metal/high-k gate stacks, including capacitance measurement, mobility measurements, gate work function estimations.

3. Advanced device performance prediction with process simulator and device simulator. Optimizations of 35nm and 25nm gate length devices with currently available process technologies including HALO and stress liner from Source/Drain area.

Representative Publications

1. D. Guo, A. Bryant, X. Wang, S. Narashima, R. Miller, M. Khare “Gate-Dielectric Permittivity and Metal-Gate Work-Function Tradeoff in Lmet = 25nm PDSOI Device Characteristics”, Vol. 27, No.7, pp. 505-507 IEEE Electron Device Letters, 2006

2. D. C. Guo, L. Y. Song, T. P. Ma “A Novel EOT Extraction Method for Ultrathin High-k Dielectrics”, 36 th IEEE Semiconductor Interface Specialists Conference (SISC), Arlington, VA, 2005

3. D. C. Guo, L. Y. Song, X. W. Wang, T. P. Ma “Comparative Study of Trapping Characteristics of HfSiON Dielectric in nMOSFETs with Poly-Si or TiN as Gate Electrode”, Electronic Materials Conference 2004, Notre Dame, Indiana

4. M. A. Quevedo-Lopez, S. A. Krishnan, P. D. Kirsch, H. J. Li, J. H. Sim, C. Huffman, J. J. Peterson,

B .H. Lee, G. Pant1, B. E. Gnade1, M. J. Kim1, R. M. Wallace1, D. Guo, H. Bu, and T.P. Ma “High Performance Gate First HfSiON Dielectric Satisfying 45nm Node Requirements”, IEDM Technical Digest, Dec 2005

5. H. M. Bu, X. W. Wang, D. C. Guo , L. Y. Song, T. P. Ma, H. Tseng, P. Tobin, “Polarity Dependence of Charge Trapping in Poly-silicon Gate HfO2 MOSFETs” Reliability Physics Symposium Proceedings, 42 nd Annual. P591. IEEE International, 2004

6. X. Y. Liu, S. Z. Lou, Z. L. Xia, D. C. Guo , H. W. Zhu, J.F. Kang, R. Q. Han, “Characteristics of Sub-100nm MOSFETs With High-k Gate Dielectrics”, Proceedings on International Conference on Solid-State Integrated-Circuit Technology, p333-336, Shanghai, 2001

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