Low-Current Measurement
Patch Clamp on a Chip
The goal of this project is to implement an extremely low current measurement system on a chip for biomedical application and patch-clamp measurements. Patch clamping is one of the most predictive analytical methods in cell and drug research, integration of this technique is highly desirable for speed and throughput, also to minimize parasitic measurement effects due to an external slow and bulky measurement system.
We have designed a state-of-the-art system capable of measuring pico-amperes of current at high rate. We are currently targeting the development of the most precise and fast measurement unit ever reported by using the Silicon on Sapphire fabrication technology and available bulk CMOS technologies.
We are the first group to fully integrate a patch-clamp measurement system for whole-cell recordings in a millimeter size device. This device is used to study the physiology of living cells and to test and improve the safety of medical compounds. The device can be used in high-throughput systems to test 384 wells simultaneously. We have achieved 5 pA RMS in noise performance and a 10pF capacitance and 4 Mohms resistance compensation capabilities (2006).
Here are some short video of the most current instrument and software demonstration:
For more information refer to this paper and the numerous others listed in our publications. This is a collaboration with prof. Fred Sigworth.

2-channels Patch-Clamp in use.
Data collected by Pujitha Weerakoon.
jClamp interface

Patch-Clamp chip with res and cap compensation.
Design by Pujitha Weerakoon.
SOS 0.5um 2006

Patch-Clamp chip 2006 results
recording from HEK 293 cells.
Data collected by Pujitha Weerakoon.

Silicon on Sapphire patch-clamp chip.
Design by Farah Laiwalla.
SOS 0.5um 2005

Silicon on Sapphire patch-clamp chip results.
From pA to hundreds of uA dynamic range!
1pA RMS noise.
Data collected by Farah Laiwalla.
First Patch-Clamp on a chip.
Design by Farah Laiwalla.
AMI 0.5um technology 2005

First patch-clamp on a chip results.
400-Hz sine current of 50-nA amplitude sampled at 2 kHz.
Data collected by Farah Laiwalla.

